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• MMU Practice
  • Question 1
  • Question 2
  • Question 3
  • Question 4
  • Question 5
  • Question 6
  • Question 7
  • Question 8
  • Question 9
  • Question 10
  • Question 11
  • Question 12
  • Question 13
  • Question 14
  • Question 15

MMU Practice

Question 1

The page offset portion of the virtual address is always copied to the physical address regardless of where a leaf is encountered during translation.

true

Question 2

If a level 0 page table starts at memory address 0x123456000, what memory address is the page table entry located given the virtual memory address 0xdeadbeef?

Give your answer in hex:

0x1234566D8

Question 3

The bit identified with the letter D in a page table entry is set by the CPU whenever the memory referred to by this page is written to.

Question 4

For an address that has a leaf at level 1, which of the following fields will make up the physical address? (select all that apply)

VPN[0], PPN[2], PPN[1], Page Offset

Question 5

The page table entry bits on a leaf at page level 0 will control how many bytes of memory?

4096

Question 6

The TLB stores recently translated entries to avoid the slow procedure of walking the page tables.

Question 7

A page table entry whose RWX bits are not all zero means that this page is a/an

leaf

Question 8

The ASID portion of the SATP register is a tag that identifies it in the TLB.

Question 9

The MMU will signal a page fault to the CPU when the MMU encounters a page table entry whose V bit is set to 0.

Question 10

A page table entry whose RWX bits are all zero means that this page is a/an

branch

Question 11

If a level 2 page table starts at memory address 0x123456000, what memory address is the page table entry located given the virtual memory address 0xdeadbeef?

Give your answer in hex:

0x123456018

Question 12

For an address that has a leaf at level 0, which of the following fields will make up the physical address? (select all that apply)

PPN[2], PPN[1], PPN[0], Page Offset

Question 13

For an address that has a leaf at level 2, which of the following fields will make up the physical address? (select all that apply)

VPN[1], VPN[0], PPN[2], Page Offset

Question 14

The MMU first looks at the satp to determine if the MMU is turned on and where to find the level 2 page table.

Question 15

Given an SATP register of 0x8000_0000_0123_456, what memory address is the level 2 page table located (in hex)?

0x00000123456000